Split gate non-volatile flash memory cells having a select gate (also referred to as a word line gate), a floating gate, a control gate and an erase gate are well known in the art. See for example U.S. Pat. Nos. 6,747,310 and 7,868,375. An erase gate having an overhang over the floating gate is also well known in the art. See for example, U.S. Pat. No. 5,242,848. All three of these patents are incorporated herein by reference in their entirety.
It is also known to form memory cells having four gates (select, control, erase, floating) and logic circuits on the same substrate. See for example U.S. patent publication 2015-0263040. However, control of relative dimensions can be difficult. The present invention includes methodology for simpler and more robust formation of the select gate, erase gate and logic gate.